Trait simba::simd::SimdBool [−][src]
pub trait SimdBool: Copy + BitAnd<Self, Output = Self> + BitOr<Self, Output = Self> + BitXor<Self, Output = Self> + Not<Output = Self> { fn bitmask(self) -> u64; fn and(self) -> bool; fn or(self) -> bool; fn xor(self) -> bool; fn all(self) -> bool; fn any(self) -> bool; fn none(self) -> bool; fn if_else<Res: SimdValue<SimdBool = Self>>(
self,
if_value: impl FnOnce() -> Res,
else_value: impl FnOnce() -> Res
) -> Res; fn if_else2<Res: SimdValue<SimdBool = Self>>(
self,
if_value: impl FnOnce() -> Res,
else_if: (impl FnOnce() -> Self, impl FnOnce() -> Res),
else_value: impl FnOnce() -> Res
) -> Res; fn if_else3<Res: SimdValue<SimdBool = Self>>(
self,
if_value: impl FnOnce() -> Res,
else_if: (impl FnOnce() -> Self, impl FnOnce() -> Res),
else_else_if: (impl FnOnce() -> Self, impl FnOnce() -> Res),
else_value: impl FnOnce() -> Res
) -> Res; }
Expand description
Lane-wise generalization of bool
for SIMD booleans.
This trait implemented by bool
as well as SIMD boolean types like packed_simd::m32x4
.
It is designed to abstract the behavior of booleans so it can work with multi-lane boolean
values in an AoSoA setting.
Required methods
A bit mask representing the boolean state of each lanes of self
.
The i-th
bit of the result is 1
iff. the i-th
lane of self
is true
.
Merges the value of if_value()
and else_value()
depending on the lanes of self
.
- For each lane of
self
containing1
, the result will contain the corresponding lane ofif_value()
. - For each lane of
self
containing0
, the result will contain the corresponding lane ofelse_value()
.
The implementor of this trait is free to choose on what cases if_value
and else_value
are actually
called.
Merges the value of if_value()
and else_if.1()
and else_value()
depending on the lanes of self
and else_if.0()
.
- For each lane of
self
containing1
, the result will contain the corresponding lane ofif_value()
. - For each lane of
self
containing0
but with a corresponding lane ofelse_if.0()
containing1
, the result will contain the corresponding lane ofelse_if.1()
. - For each lane of
self
containing0
but with a corresponding lane ofelse_if.0()
containing0
, the result will contain the corresponding lane ofelse_value()
.
The implementor of this trait is free to choose on what cases any of those closures are implemented.
Merges the value of if_value()
and else_if.1()
and else_else_if.1()
and else_value()
depending on the lanes of self
and else_if.0()
and else_else_if.0()
.
- For each lane of
self
containing1
, the result will contain the corresponding lane ofif_value()
. - For each lane of
self
containing0
but with a corresponding lane ofelse_if.0()
containing1
, the result will contain the corresponding lane ofelse_if.1()
. - For each lane of
self
containing0
andelse_if.0()
containing0
andelse_else_if.0()
containing1
, the result will contain the corresponding lane ofelse_else_if.1()
. - Other lanes will contain the corresponding lane of
else_value()
.
The implementor of this trait is free to choose on what cases any of those closures are implemented.